In an existing TFT (Thin Film Transistor) array substrate, an active layer of a thin film transistor is usually made of hydrogenated amorphous silicon (a-Si:H). a-Si:H has advantages of good homogeneity, the capability of large-area deposition, good thin film stability, etc. However, the active layer made of a-Si:H has low carrier mobility. Because there are many defects in a-Si:H, most charges attracted by a gate in a TFT array substrate are captured in the defects and cannot conduct electricity, so that the carrier mobility of the active layer is less than 1 cm2/(V*s), thus the channel current is relatively small, and it is difficult to meet the requirements of some high-performance display devices.
In the existing methods, an active layer made of low-temperature polycrystalline silicon materials or amorphous IGZO (indium gallium zinc oxide) may have higher carrier mobility. However, the low-temperature polycrystalline silicon is complicated in manufacturing process, high in manufacturing cost and poor in homogeneity and stability, comprehensive and stable crystallization of the low-temperature polycrystalline silicon is difficult to be realized, while the amorphous IGZO is high in manufacturing cost, immature in manufacturing process and low in yield.